Faculty-in-charge: Ms. Suchitra S. Rao
Lab in charge : Vipin Roy
The objective of this lab is to perform different experiments to get a thorough knowledge of the various gates and circuits used in VLSI Design. They get to design the digital circuits in different modeling styles. To add on, they are also exposed to the embedded world using PIC where-in one can program PIC for several functions or can interface it with outside world.
The students will be able to have a better understanding about the concepts learned and they will gain experience in designing, testing and implementing digital circuits. The lab is equipped with Simulation software’s like Xilinx ISE/Vivado and FPGA/PIC Boards.
List of Experiments
- Verilog implementation of multiplexer, demultiplexer, full adder & full subtractor, decoder
- Using structural modeling implement 4:1 multiplexer using 2:1 multiplexer, four bit full adder using one bit full adder, 4 bit counters
- Using behavioural modelling implement D flip flop, J K flip flop
- Using switch level modellimg implement one bit full adder, multiplexer, CMOS AND gate , CMOS OR gate