Department of Electronics and Communication Engineering conducted a two day workshop on Verilog on 26th and 27th September for the fifth semester students. This initiative is part of rider courses the department offers for the students to improve their skill set. Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. The workshop was beneficial to the students and was a strong platform for understanding and extracting key ideas of electronics system modeling.
